DMA units are found in all types of hardware, it is one of the fundamental pieces to communicate the peripherals with each other and with the main memory. While the IOMMU is in charge of managing the addressing, it is the DMA unit that does the job of transferring data from memory to a peripheral directly. We explain how these units and the different types work.
In the early days of home computing there were no DMA drives, so when peripherals had to communicate with RAM they did so in two different ways:
- Some CPUs had a HALT pin that when receiving a signal stopped its activity to recover it at the same point later.
- There were cases where access to RAM was sandwiched between the CPU and peripherals.
That is why it was necessary to add direct memory access controllers or DMAs , in order to facilitate the work when transmitting data.
Operation of a DMA unit
The operation of a DMA unit is as follows:
- A memory address is specified at source
- The amount of data to be transmitted is specified
- A memory address is specified as the destination.
- The data is transferred from one memory to another.
DMA drives are mainly used to give peripherals access to system RAM , but they are also used to transmit data from system RAM to local RAMs of different peripherals such as VRAM . They do this without any processor having to transfer data from one memory to another, making it possible to dedicate themselves to performing other tasks.
A DMA controller can have several different channels , this is because it is possible to make several simultaneous shipments with different origins and destinations . What’s more, DMA channels are used to communicate a processor with its coprocessors directly and not just to access memory.
For example. The PCI Express Resizable Bar, on which AMD’s Smart Access Memory is based, is made possible by a DMA unit communicating the CPU with the VRAM directly.
It is also the case with dual graphics cards, whether with two chips on the same board or on two different cards, where the Crossfire interfaces from AMD and SLI from NVIDIA are still DMA units connected to each other.
Operating modes of a DMA unit
Keep in mind that a DMA drive can work in one of the following ways, with both or all three at the same time, it will depend on how it has been designed for data transfer.
- Burst mode: In this mode the DMA unit sends an interrupt that paralyzes the use of memory by the processor, which will remain paused until the DMA unit has finished transferring.
- Cycle Stealing Mode: For every x bytes transmitted, the DMA drive returns memory access to the processor. Contrary to the previous case, it does not require the processor to be idle for long periods of time.
- Transparent mode: In this mode, the DMA unit only transmits data when the CPU executes an instruction that does not require access to memory.
They not only serve to transmit data
One of the things that DMA units allow is to vary the nature of the data they transmit , for example, we can have a compressed data at the source and have it decompressed at the destination and even decode a media format.
Since what a DMA unit does is transmit a block of data from a source to a destination then it can have an accelerator or a fixed function unit that manipulates the information . This is extremely useful when decoding multimedia data such as the following:
- Image formats like JPEG, GIF. PNG.
- Music formats such as MP3, OGG, etc.
- Video formats of all kinds.
- File compression formats such as: Zlib, 7z, etc.
DMA units also take care of internal communication
Some accelerators and coprocessors do not use the system memory and not even their own memory being inside the processor and with its memory inside it , these units need a DMA interface that allows them to send and receive data . In some specific cases, they are assigned channels from the main DMA of the processor they exclusively assist.
This is especially used when we have a scratchpad RAM , which is a type of RAM that is inside the processor and with a different data path than RAM. Most coprocessors and accelerators are assigned a scratchpad memory for local use where the only way to access it is through specific DMA channels.